Supertex inc. VN10K N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Applications Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex's well-proven, silicongate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Ordering Information Device VN10K Package BVDSS/BVDGS RDS(ON) ID(ON) TO-92 (V) (max) () (min) (mA) VN10KN3-G 60 5.0 750 For packaged products, -G indicates package is RoHS compliant (`Green'). Consult factory for die / wafer form part numbers. Refer to Die Specification VF21 for layout and dimensions. Absolute Maximum Ratings Pin Configuration Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage 30V Operating and storage temperature -55OC to +150OC DRAIN SOURCE Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. GATE TO-92 (N3) Product Marking SiVN 1 0 K YYWW YY = Year Sealed WW = Week Sealed = "Green" Packaging Package may or may not include the following marks: Si or TO-92 (N3) Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com VN10K Thermal Characteristics ID ID Power Dissipation jc Package (continuous) (mA) (pulsed) (A) @TC = 25OC (W) ( C/W) TO-92 310 1.0 1.0 125 O ( C/W) IDR (mA) IDRM 170 310 1.0 O ja (A) Notes: ID (continuous) is limited by max rated Tj . (VN0106N3 can be used if an ID (continuous) of 500mA is needed.) Electrical Characteristics (T A Sym Parameter BVDSS VGS(th) = 25OC unless otherwise specified) Min Typ Max Units Drain-to-source breakdown voltage 60 - - V VGS = 0V, ID = 100A Gate threshold voltage 0.8 - 2.5 V VGS = VDS, ID= 1.0mA Change in VGS(th) with temperature - -3.8 - IGSS Gate body leakage - - 100 - - 10 IDSS Zero gate voltage drain current ID(ON) On-state drain current VGS(th) RDS(ON) RDS(ON) mV/ C VGS = VDS, ID= 1.0mA O nA VGS = 15V, VDS = 0V VGS = 0V, VDS = 45V A VGS = 0V, VDS = 45V, TA = 125C A VGS = 10V, VDS = 10V - - 500 0.75 - - - - 7.5 - - 5.0 - 0.7 - %/ C 100 - - mmho VDS = 10V, ID = 500mA Static drain-to-source on-state resistance Change in RDS(ON) with temperature GFS Forward transductance CISS Input capacitance - 48 60 COSS Common source output capacitance - 16 25 CRSS Reverse transfer capacitance - 2.0 5.0 t(ON) Turn-on time - - 10 t(OFF) Turn-off time - - 10 VSD Diode forward voltage drop - 0.8 Reverse recovery time - 160 trr Conditions O VGS = 5.0V, ID = 200mA VGS = 10V, ID = 500mA VGS = 10V, ID = 500mA pF VGS = 0V, VDS = 25V, f = 1.0MHz ns VDD = 15V, ID = 600mA, RGEN = 25 - V VGS = 0V, ISD = 500mA - ns VGS = 0V, ISD = 500mA Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 10V VDD 90% Pulse Generator INPUT 0V 10% t(ON) t(OFF) tr td(ON) VDD OUTPUT 0V td(OFF) 90% Supertex inc. OUTPUT RGEN tf INPUT 10% 10% RL D.U.T. 90% 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2 VN10K Typical Performance Curves Output Characteristics 1.0 VGS = 10V 8V Saturation Characteristics 1.0 7V 0.8 VGS = 10V 9V 0.8 8V ID (amperes) ID (amperes) 6V 0.6 5V 0.4 7V 6V 0.6 5V 0.4 4V 0.2 4V 0.2 3V 3V 2V 0 0 10 20 30 2V 40 0 50 0 2.0 4.0 Transconductance vs. Drain Current 250 6.0 8.0 10 VDS (volts) VDS (volts) 2.0 Power Dissipation vs. Case Temperature 200 PD (watts) GFS (m ) 150 100 VDS = 10V 300s, 2% Duty Cycle, Pulse Test 50 10 0 200 400 600 800 ID (mA) 0 1000 Maximum Rated Safe Operating Area 25 50 75 100 125 150 Switching Waveform 10 TC = 25OC 1.0 ID (amperes) 0 TC (OC) Output Voltage (volts) 0 TO-92 1.0 5.0 0 Input Voltage (volts) TO-92 (DC) 0.1 0.01 1.0 10 100 10 5.0 0 0 1000 10 20 30 40 t - Time (ns) VDS (volts) Supertex inc. 15 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 3 50 VN10K Typical Performance Curves (cont.) BVDSS Variation with Temperature On-Resistance vs. Gate-to-Source Voltage 100 VDS = 0.1V RDS(ON) (ohms) BVDSS (normalized) 1.1 1.0 10 0.9 -50 0 50 100 1.0 1.0 150 10 1.0 Transfer Characteristics 1.0 Output Conductance vs Drain Current VDS = 10V 300s, 2% Duty Cycle, Pulse Test 0.6 GFS (mhos) ID (amperes) 0.8 100 VGS (volts) Tj (OC) 0.4 VDS = 25V 80s, 1% Duty Cycle, Pulse Test Reduction Due to Heating 0.1 0.2 0 0 2.0 4.0 6.0 8.0 0.01 0.01 10 0.1 Transconductance vs Gate-Source Voltage Capacitance vs. Drain-to-Source Voltage 50 250 200 30 150 Gfs (m ) 40 C (picofarads) CISS 20 COSS 10 1.0 ID (amperes) VGS (volts) VDS = 10V 3000s, 2% Duty Cycle Pulse Test 100 50 CRSS 0 0 10 20 30 40 0 0 50 VDS (volts) Supertex inc. 2.0 4.0 6.0 8.0 10 VGS (volts) 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 4 VN10K 3-Lead TO-92 Package Outline (N3) D A Seating Plane 1 2 3 L b e1 e c Side View Front View E1 E 3 1 2 Bottom View Symbol Dimensions (inches) A b c D E E1 e e1 L MIN .170 .014 .014 .175 .125 .080 .095 .045 .500 NOM - - - - - - - - - MAX .210 .022 .022 .205 .165 .105 .105 .055 .610* JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate "product liability indemnification insurance agreement." Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. (c)2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-VN10K B031411 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 5